{"type":"doc","content":[{"type":"extension","attrs":{"layout":"default","extensionType":"com.atlassian.confluence.macro.core","extensionKey":"toc","parameters":{"macroParams":{"style":{"value":"none"}},"macroMetadata":{"macroId":{"value":"80554139-022f-4a09-a2c0-43506252abdc"},"schemaVersion":{"value":"1"},"title":"Table of Contents"}},"localId":"e76cba08-7518-40b3-adaa-1eca8088261d"}},{"type":"paragraph"},{"type":"panel","attrs":{"panelType":"info"},"content":[{"type":"paragraph","content":[{"text":"This is an add-on product that installs on top of the Linux BSP for the NXP i.MX RT10XX EVK board. It must be purchased separately from the Linux BSP product.","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"1. Overview","type":"text"}]},{"type":"paragraph","content":[{"text":"This document describes how to support for the LPSPI controller of the i.MX RT10XX processor in the Linux BSP.","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"2. Requirements","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"2.1. Detailed Requirements","type":"text"}]},{"type":"paragraph","content":[{"text":"The following are the requirements for this project:","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Provide a Linux demo project combining all the requirements in this project.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Rationale","type":"text","marks":[{"type":"em"}]},{"text":": Needed to let Customer integrate results of this project into target embedded application.","type":"text"},{"type":"hardBreak"},{"text":"Implementation","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Design: Demo project\"","type":"text","marks":[{"type":"link","attrs":{"href":"#Design-Demo-Project"}}]},{"text":".","type":"text"},{"type":"hardBreak"},{"text":"Test","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Test Plan: Demo Project\"","type":"text","marks":[{"type":"link","attrs":{"href":"#TestPlan-Demo-Project"}}]},{"text":".","type":"text"}]}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Provide support for the i.MX RT1050 LPSPI controller in Linux.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Rationale","type":"text","marks":[{"type":"em"}]},{"text":": Explicit Customer requirement.","type":"text"},{"type":"hardBreak"},{"text":"Implementation","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Design: Linux LPSPI Device Driver\"","type":"text","marks":[{"type":"link","attrs":{"href":"#Design-Linux-LPSPI-Device-Driver"}}]},{"text":".","type":"text"},{"type":"hardBreak"},{"text":"Test","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Test Plan: Linux LPSPI Driver\"","type":"text","marks":[{"type":"link","attrs":{"href":"#TestPlan-Linux-LPSPI-Driver"}}]},{"text":".","type":"text"}]}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Provide support for the raw access to the SPI device from user space.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Rationale","type":"text","marks":[{"type":"em"}]},{"text":": Explicit Customer requirement.","type":"text"},{"type":"hardBreak"},{"text":"Implementation","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Design: Raw SPI Device Access\"","type":"text","marks":[{"type":"link","attrs":{"href":"#Design-Raw-SPI-Device-Access"}}]},{"text":".","type":"text"},{"type":"hardBreak"},{"text":"Test","type":"text","marks":[{"type":"em"}]},{"text":": ","type":"text"},{"text":"Section: \"Test Plan: Raw SPI Device Access\"","type":"text","marks":[{"type":"link","attrs":{"href":"#TestPlan-Raw-SPI-Device-Access"}}]},{"text":".","type":"text"}]}]}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"2.2. Detailed Non-Requirements","type":"text"}]},{"type":"paragraph","content":[{"text":"The following are the non-requirements for this project that may otherwise not be obvious:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"None","type":"text"}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"3. Design","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"3.1. Detailed Design","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"3.1.1. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"Design-Demo-Project"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-Design-Demo-Project"}},"macroMetadata":{"macroId":{"value":"5556acf5328a561827990fe1cda121df63f1392929e54b03eef3d89828e78e13"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"faaf9331-5954-48d2-9690-0c6e26c76590"}},{"text":"Design: Demo Project","type":"text"}]},{"type":"paragraph","content":[{"text":"This project will enable the required functionality in the Linux configuration (\"embedded project\") called ","type":"text"},{"text":"rootfs","type":"text","marks":[{"type":"code"}]},{"text":", which resides in a ","type":"text"},{"text":"projects/rootfs","type":"text","marks":[{"type":"code"}]},{"text":" directory, relative to the top of the Linux i.MX RT1050 or i.MX RT1060 installation.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"3.1.2. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"Design-Linux-LPSPI-Device-Driver"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-Design-Linux-LPSPI-Device-Driver"}},"macroMetadata":{"macroId":{"value":"1d4fa84f24bc72a1e34c37a2f25b262a9db0804ee89bd0c91884e8d557030b73"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"9d01081b-0fe8-4671-a387-b4391d2ccb5f"}},{"text":"Design: Linux LPSPI Device Driver","type":"text"}]},{"type":"paragraph","content":[{"text":"In the i.MXRT1050/1060 SoC, the ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" controller is compatible with the same controller of some other SoCs from the i.MX family, so the existing ","type":"text"},{"text":"spi-fsl-lpspi.c","type":"text","marks":[{"type":"code"}]},{"text":" driver in the Linux sources, which was initially added to support SPI in the i.MX7ULP SoC, will be used to support the ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" controller of the i.MXRT1050/1060 SoC.","type":"text"}]},{"type":"paragraph","content":[{"text":"To enable the driver, the standard ","type":"text"},{"text":"CONFIG_SPI","type":"text","marks":[{"type":"code"}]},{"text":" along with the ","type":"text"},{"text":"CONFIG_SPI_FSL_LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" options will be defined in the kernel ","type":"text"},{"text":"defconfig","type":"text","marks":[{"type":"code"}]},{"text":" file.","type":"text"}]},{"type":"paragraph","content":[{"text":"In addition to the kernel ","type":"text"},{"text":"defconfig","type":"text","marks":[{"type":"code"}]},{"text":", the user must configure the ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" controller in ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":". Refer to ","type":"text"},{"text":"https://www.kernel.org/doc/Documentation/devicetree/bindings/spi/spi-controller.yaml","type":"text","marks":[{"type":"link","attrs":{"href":"https://www.kernel.org/doc/Documentation/devicetree/bindings/spi/spi-controller.yaml"}}]},{"text":" for details on format of the SPI nodes.","type":"text"}]},{"type":"paragraph","content":[{"text":"The ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":" nodes for all 4 instances of the i.MXRT1050/1060 ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" controller will be predefined in ","type":"text"},{"text":"arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi","type":"text","marks":[{"type":"code"}]},{"text":"or in ","type":"text"},{"text":"arch/arm/boot/dts/nxp/imx/imxrt1060.dtsi.","type":"text","marks":[{"type":"code"}]},{"text":" The clock driver for the i.MXRT1050/1060 SoC will be updated to support the ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" clocks. Interrupts and clocks will be defined in the ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":" nodes according to the processor reference manual. All controllers will be configured to use the DMA. All the SPI nodes in the ","type":"text"},{"text":".dtsi","type":"text","marks":[{"type":"code"}]},{"text":" file will be disabled by default.","type":"text"}]},{"type":"paragraph","content":[{"text":"Final tuning of the kernel run-time configuration, such as defining the ","type":"text"},{"text":"pinctrl","type":"text","marks":[{"type":"code"}]},{"text":" settings for a custom connection of an SPI device to the ","type":"text"},{"text":"LPSPI","type":"text","marks":[{"type":"code"}]},{"text":" controller, defining the ","type":"text"},{"text":"chip-select","type":"text","marks":[{"type":"code"}]},{"text":" signal, customizing the clocks etc, will be done in the user ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":" file.","type":"text"}]},{"type":"paragraph","content":[{"text":"This project will provide an example for configuring the ","type":"text"},{"text":"LPSPI1","type":"text","marks":[{"type":"code"}]},{"text":" controller. There are no SPI devices on the IMXRT1050/1060-EVKB board connected to the LPSPI controller, so external SPI Flash connected via the SD TF to TF Flexible Card Extension cable will be used to demonstrate reading the SPI device registers.","type":"text"}]},{"type":"paragraph","content":[{"text":"The ","type":"text"},{"text":"lpspi1","type":"text","marks":[{"type":"code"}]},{"text":" node will be configured in the ","type":"text"},{"text":"rootfs.dts.IMXRT105X_NXPEVK","type":"text","marks":[{"type":"code"}]},{"text":" or in the ","type":"text"},{"text":"rootfs.dts.IMXRT106X_NXPEVK","type":"text","marks":[{"type":"code"}]},{"text":" file as follows:","type":"text"}]},{"type":"codeBlock","content":[{"text":"&lpspi1 {\n pinctrl-names = \"default\";\n pinctrl-0 = <&pinctrl_lpspi1>;\n status = \"okay\";\n cs-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;\n\n num-chipselects = <1>;\n...\n};\n\n&iomuxc {\n...\n pinctrl_lpspi1: lpspi1grp {\n fsl,pins = <\n MXRT1050_IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK MXRT10XX_PAD_CFG_SPI\n MXRT1050_IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO MXRT10XX_PAD_CFG_SPI\n MXRT1050_IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI MXRT10XX_PAD_CFG_SPI\n\n /* CS#1 (SPI Flash) */\n MXRT1050_IOMUXC_GPIO_SD_B0_01_GPIO3_IO13 MXRT10XX_PAD_CFG_GPIO\n >;\n };\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"This example assigns the i.MXRT1050/1060 ","type":"text"},{"text":"pinctrl","type":"text","marks":[{"type":"code"}]},{"text":" PADs ","type":"text"},{"text":"GPIO_SD_B0_00","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"GPIO_SD_B0_01","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"GPIO_SD_B0_02","type":"text","marks":[{"type":"code"}]},{"text":" and ","type":"text"},{"text":"GPIO_SD_B0_03","type":"text","marks":[{"type":"code"}]},{"text":" to the ","type":"text"},{"text":"LPSPI1","type":"text","marks":[{"type":"code"}]},{"text":" controller and selects the ","type":"text"},{"text":"LPSPI1_SCK","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"GPIO","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"LPSPI1_SDO","type":"text","marks":[{"type":"code"}]},{"text":" and ","type":"text"},{"text":"LPSPI1_SDI","type":"text","marks":[{"type":"code"}]},{"text":" functions for these PADs (refer to the board schematics and to the processor reference manual for details on possible ","type":"text"},{"text":"IOMUXC","type":"text","marks":[{"type":"code"}]},{"text":" configurations).","type":"text"}]},{"type":"paragraph","content":[{"text":"The single ","type":"text"},{"text":"chip-select","type":"text","marks":[{"type":"code"}]},{"text":" is configured to the ","type":"text"},{"text":"GPIO3 13","type":"text","marks":[{"type":"code"}]},{"text":" signal in the example.","type":"text"}]},{"type":"paragraph","content":[{"text":"Due to the fact that the ","type":"text"},{"text":"GPIO_SD_B0_00","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"GPIO_SD_B0_01","type":"text","marks":[{"type":"code"}]},{"text":", ","type":"text"},{"text":"GPIO_SD_B0_02","type":"text","marks":[{"type":"code"}]},{"text":" and ","type":"text"},{"text":"GPIO_SD_B0_03","type":"text","marks":[{"type":"code"}]},{"text":" PADs are used for the SD card controller, the changes for ","type":"text"},{"text":"LPSPI1","type":"text","marks":[{"type":"code"}]},{"text":" will be provided under the ","type":"text"},{"text":"#if defined(SPI_FLASH_ON_LPSPI1)","type":"text","marks":[{"type":"code"}]},{"text":" condition. If the ","type":"text"},{"text":"SPI_FLASH_ON_LPSPI1","type":"text","marks":[{"type":"code"}]},{"text":" is defined in ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":", the SD-card controller will be disabled.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"3.1.3. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"Design-Raw-SPI-Device-Access"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-Design-Raw-SPI-Device-Access"}},"macroMetadata":{"macroId":{"value":"63feeec91d6b2faa1029b0c995b2f7de4b6fbfea1c4af6ea355e73772c7561f7"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"23ea5a22-cc88-41e7-8045-d3cba0945315"}},{"text":"Design: Raw SPI Device Access","type":"text"}]},{"type":"paragraph","content":[{"text":"Linux provides a special ","type":"text"},{"text":"spidev","type":"text","marks":[{"type":"code"}]},{"text":" device driver to allow raw accesses to SPI devices from the user space: ","type":"text"},{"text":"https://www.kernel.org/doc/Documentation/spi/spidev","type":"text","marks":[{"type":"link","attrs":{"href":"https://www.kernel.org/doc/Documentation/spi/spidev"}}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"The standard Linux ","type":"text"},{"text":"CONFIG_SPI_SPIDEV","type":"text","marks":[{"type":"code"}]},{"text":" option will be defined in the kernel ","type":"text"},{"text":"defconfig","type":"text","marks":[{"type":"code"}]},{"text":" file to enable the ","type":"text"},{"text":"spidev","type":"text","marks":[{"type":"code"}]},{"text":" driver. The universal compatibility string \"","type":"text"},{"text":"linux,spidev","type":"text","marks":[{"type":"code"}]},{"text":"\" will be added to the ","type":"text"},{"text":"spidev","type":"text","marks":[{"type":"code"}]},{"text":" driver so that it can be used in the project ","type":"text"},{"text":"DTS","type":"text","marks":[{"type":"code"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"The following changes will be made to ","type":"text"},{"text":"rootfs.dts.IMXRT105X_NXPEVK","type":"text","marks":[{"type":"code"}]},{"text":" to link an external SPI Flash to the ","type":"text"},{"text":"spidev","type":"text","marks":[{"type":"code"}]},{"text":" Linux device:","type":"text"}]},{"type":"codeBlock","content":[{"text":"&lpspi1 {\n...\n#if defined(LPSPI_USE_SPIDEV)\n spidev: spidev@0 {\n status = \"okay\";\n compatible = \"linux,spidev\";\n spi-max-frequency = <33000000>;\n reg = <0>;\n };\n...\n#endif\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following test program ","type":"text"},{"text":"spidev_flash","type":"text","marks":[{"type":"code"}]},{"text":" will be included to the project root file system as an example on how to read the Flash ID of an SPI Flash device from the user-space applications:","type":"text"}]},{"type":"codeBlock","content":[{"text":"/* \n * Sample application that makes use of the SPIDEV interface \n * to access an SPI slave device. Specifically, this sample \n * reads a Device ID of a JEDEC-compliant SPI Flash device. \n */ \n \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n \nint main(int argc, char **argv) \n{ \n char *name; \n int fd; \n struct spi_ioc_transfer xfer[2]; \n unsigned char buf[32], *bp; \n int len, status; \n \n name = argv[1]; \n fd = open(name, O_RDWR); \n if (fd < 0) { \n perror(\"open\"); \n return 1; \n } \n \n memset(xfer, 0, sizeof xfer); \n memset(buf, 0, sizeof buf); \n len = sizeof buf; \n \n /* \n * Send a GetID command \n */ \n buf[0] = 0x9f; \n len = 6; \n xfer[0].tx_buf = (unsigned long)buf; \n xfer[0].len = 1; \n \n xfer[1].rx_buf = (unsigned long) buf; \n xfer[1].len = 6; \n \n status = ioctl(fd, SPI_IOC_MESSAGE(2), xfer); \n if (status < 0) { \n perror(\"SPI_IOC_MESSAGE\"); \n return -1; \n } \n \n printf(\"response(%d): \", status); \n for (bp = buf; len; len--) \n printf(\"%02x \", *bp++); \n printf(\"\\n\"); \n \n return 0; \n} ","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"3.2. Effect on Related Products","type":"text"}]},{"type":"paragraph","content":[{"text":"This project makes the following updates in the related products:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"None","type":"text"}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"3.3. Changes to User Documentation","type":"text"}]},{"type":"paragraph","content":[{"text":"This project updates the following user documents:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"None","type":"text"}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"3.4. Alternative Design","type":"text"}]},{"type":"paragraph","content":[{"text":"The following alternative design approaches were considered by this project but then discarded for some reason:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"None","type":"text"}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"4. Test Plan","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"4.1. Secure Download Area","type":"text"}]},{"type":"paragraph","content":[{"text":"The downloadable materials developed by this project are available from a secure Web page on the Emcraft Systems web site. Specifically, proceed to the following URL to download the software materials:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"For the i.MX RT1050 BSP (","type":"text"},{"text":"release 3.0.4","type":"text","marks":[{"type":"em"}]},{"text":"):","type":"text"}]}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"https://www.emcraft.com/imxrtaddon/imxrt1050/lpspi/","type":"text","marks":[{"type":"link","attrs":{"href":"https://www.emcraft.com/imxrtaddon/imxrt1050/lpspi/"}}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"The page is protected as follows:","type":"text"}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Login: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Password: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"For the i.MX RT1050 BSP (","type":"text"},{"text":"release 3.1.0","type":"text","marks":[{"type":"em"}]},{"text":"):","type":"text"}]}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"https://www.emcraft.com/imxrtaddon/imxrt1050-3.1.0/lpspi/","type":"text","marks":[{"type":"link","attrs":{"href":"https://www.emcraft.com/imxrtaddon/imxrt1050-3.1.0/lpspi/"}}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"The page is protected as follows:","type":"text"}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Login: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Password: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"For the i.MX RT1060 BSP (","type":"text"},{"text":"release 3.1.0","type":"text","marks":[{"type":"em"}]},{"text":"):","type":"text"}]}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"https://www.emcraft.com/imxrtaddon/imxrt1060-3.1.0/lpspi/","type":"text","marks":[{"type":"link","attrs":{"href":"https://www.emcraft.com/imxrtaddon/imxrt1060-3.1.0/lpspi/"}}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"The page is protected as follows:","type":"text"}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Login: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"paragraph","marks":[{"type":"indentation","attrs":{"level":1}}],"content":[{"text":"Password: ","type":"text"},{"text":"CONTACT EMCRAFT","type":"text","marks":[{"type":"em"}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"4.2. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"Downloadable-Files"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-Downloadable-Files"}},"macroMetadata":{"macroId":{"value":"f25c5fd3097bf3785f0b200fee70ebf30efcdcac736706d2e29b6a8fcefbcc08"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"ef9af1d2-9616-45be-8bc9-d2936edeeec1"}},{"text":"Downloadable Files","type":"text"}]},{"type":"paragraph","content":[{"text":"The following files are available from the secure download area:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"linux-lpspi.patch","type":"text","marks":[{"type":"code"}]},{"text":" - patch to the Linux kernel sources;","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"projects-lpspi.patch","type":"text","marks":[{"type":"code"}]},{"text":" - patch to the ","type":"text"},{"text":"rootfs","type":"text","marks":[{"type":"code"}]},{"text":" project;","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"rootfs.uImage","type":"text","marks":[{"type":"code"}]},{"text":" - prebuilt bootable Linux image;","type":"text"}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"4.3. Test Set-Up","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4.3.1. Hardware Setup","type":"text"}]},{"type":"paragraph","content":[{"text":"The following hardware setup is required for the i.MX RT 1050/1060 board:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"The i.MXRT1050 EVKB board or i.MXRT1060 EVKB board.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Micron M25P32 SPI Flash Memory, as a separate chip.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Connect the SPI Flash memory via the \"SD TF to TF Flexible Card Extension cable Extender Adapter\" attached to the TF Card Slot ","type":"text"},{"text":"J20","type":"text","marks":[{"type":"code"}]},{"text":". Details of those connection are as follows:","type":"text"}]}]}]},{"type":"table","attrs":{"layout":"center","width":1012.0,"localId":"a3c29132-39be-4fe8-964b-3e6fc53a1f22"},"content":[{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"SPI Memory Signal/Function","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"J20 Pin#","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"MCU Signal","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"MCU PAD","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"CS#/Chip Select","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"5","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"LPSPI1_PCS0","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO_SD_B0_01","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"SCLK/Clock Input","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"3","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"LPSPI1_SCK","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO_SD_B0_00","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"SI/Serial Data Input","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"7","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"LPSPI1_SDO","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO_SD_B0_02","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"SO/Serial Data Output","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"8","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"LPSPI1_SDI","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[170.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO_SD_B0_03","type":"text"}]}]}]}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4.3.2. Software Setup","type":"text"}]},{"type":"paragraph","content":[{"text":"The following software setup is required:","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Download the files listed in ","type":"text"},{"text":"Section: \"Downloadable Files\"","type":"text","marks":[{"type":"link","attrs":{"href":"#downloadable-files"}}]},{"text":" to the top of the Linux i.MX RT installation.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Install the BSP, as per the respective \"Installing and activating cross development environment\" document in the \"Software\" section on the Emcraft site.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"From the top of the Linux installation, activate the Linux cross-compile environment by running:","type":"text"}]},{"type":"codeBlock","content":[{"text":"$ . ACTIVATE.sh","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"From the top of the BSP installation, go to the Linux kernel tree and install the kernel patch, eg:","type":"text"}]},{"type":"codeBlock","content":[{"text":"$ cd linux/\n$ patch -p1 < ../../linux-lpspi.patch","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"From the top of the Linux installation, go to the ","type":"text"},{"text":"projects","type":"text","marks":[{"type":"code"}]},{"text":" sub-directory, and patch the ","type":"text"},{"text":"rootfs","type":"text","marks":[{"type":"code"}]},{"text":" project:","type":"text"}]},{"type":"codeBlock","content":[{"text":"$ cd projects/\n$ patch -p1 < ../../projects-lpspi.patch","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Build the ","type":"text"},{"text":"rootfs","type":"text","marks":[{"type":"code"}]},{"text":" project:","type":"text"}]},{"type":"codeBlock","content":[{"text":"$ cd projects/rootfs\n$ make","type":"text"}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"4.4. Detailed Test Plan","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4.4.1. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"TestPlan-Demo-Project"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-TestPlan-Demo-Project"}},"macroMetadata":{"macroId":{"value":"c041cd2c626f8c6c49dc24bb78123f0e064af5b65a54a0311b93d66fd071d57e"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"3887bf0a-e02a-40a2-8df8-ba63ac36844d"}},{"text":"Test Plan: Demo Project","type":"text"}]},{"type":"paragraph","content":[{"text":"Perform the following step-wise test procedure:","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Go to the ","type":"text"},{"text":"projects/rootfs","type":"text","marks":[{"type":"code"}]},{"text":" directory, build the loadable Linux image (","type":"text"},{"text":"rootfs.uImage","type":"text","marks":[{"type":"code"}]},{"text":") and copy it to the TFTP directory on the host:","type":"text"}]},{"type":"codeBlock","content":[{"text":"$ cd projects/rootfs\n$ make","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Boot the loadable Linux image (","type":"text"},{"text":"rootfs.uImage","type":"text","marks":[{"type":"code"}]},{"text":") to the target via TFTP and validate that it boots to the Linux shell:","type":"text"}]},{"type":"codeBlock","content":[{"text":"=> run netboot\nUsing ethernet@40424000 device\nTFTP from server 192.168.1.96; our IP address is 192.168.1.86\nFilename 'imxrt1050/rootfs.uImage'.\nLoad address: 0x80007fc0\nLoading: #################################################################\n #################################################################\n #################################################################\n #################################################################\n...\n\n/ # uname \nLinux\n/ #","type":"text"}]}]}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4.4.2. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"TestPlan-Linux-LPSPI-Driver"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-TestPlan-Linux-LPSPI-Driver"}},"macroMetadata":{"macroId":{"value":"c096eef0b33cf4bc09da5416f130ad7484af8a5a52f3c340031037ce1e11545b"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"f1bcb3c5-6f76-482d-9abd-9325160c92bb"}},{"text":"Test Plan: Linux LPSPI Driver","type":"text"}]},{"type":"paragraph","content":[{"text":"Perform the following step-wise test procedure:","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"From the Linux shell, run ","type":"text"},{"text":"dmesg","type":"text","marks":[{"type":"code"}]},{"text":" and verify that there are no error messages related to SPI or LPSPI:","type":"text"}]},{"type":"codeBlock","content":[{"text":"/ # dmesg\n...\n/ # dmesg | grep spi\n/ #","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Verify that the ","type":"text"},{"text":"spi0","type":"text","marks":[{"type":"code"}]},{"text":" master is registered in the ","type":"text"},{"text":"sysfs","type":"text","marks":[{"type":"code"}]},{"text":":","type":"text"}]},{"type":"codeBlock","content":[{"text":"/ # ls /sys/class/spi_master/\nspi0\n/ # ","type":"text"}]}]}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4.4.3. ","type":"text"},{"type":"inlineExtension","attrs":{"extensionType":"com.atlassian.confluence.macro.core","extensionKey":"anchor","parameters":{"macroParams":{"":{"value":"TestPlan-Raw-SPI-Device-Access"},"legacyAnchorId":{"value":"SupportingSPIintheLinuxi.MXRT10XXBSP-TestPlan-Raw-SPI-Device-Access"}},"macroMetadata":{"macroId":{"value":"95d4eb1befd8dcf1cdb79ec976ecf594c923617bcbb006bcbe465f0ac8b2b7ee"},"schemaVersion":{"value":"1"},"title":"Anchor"}},"localId":"1cdbdfc7-d9d9-4980-80a0-c8ff938f9c41"}},{"text":"Test Plan: Raw SPI Device Access","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Replace the SD card in the SD card slot by the SPI Flash memory ","type":"text"},{"text":"M25P32","type":"text","marks":[{"type":"code"}]},{"text":" using \"SD TF to TF Flexible Card Extension cable Extender Adapter\".","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Make sure the ","type":"text"},{"text":"spidev","type":"text","marks":[{"type":"code"}]},{"text":" device exists:","type":"text"}]},{"type":"codeBlock","content":[{"text":"/ # ls -l /dev/spidev0.0 \ncrw------- 1 root root 153, 0 Jan 1 00:00 /dev/spidev0.0\n/ # \n","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Make sure the ","type":"text"},{"text":"spidev_flash","type":"text","marks":[{"type":"code"}]},{"text":" application reads the correct Flash ID over SPI (first 3 bytes must be ","type":"text"},{"text":"0x20","type":"text","marks":[{"type":"code"}]},{"text":" ","type":"text"},{"text":"0x20","type":"text","marks":[{"type":"code"}]},{"text":" ","type":"text"},{"text":"0x16","type":"text","marks":[{"type":"code"}]},{"text":" for the ","type":"text"},{"text":"M25P32","type":"text","marks":[{"type":"code"}]},{"text":" Flash connected the IMXRT1050-EVK board):","type":"text"}]},{"type":"codeBlock","content":[{"text":"/ # spidev_flash /dev/spidev0.0\nresponse(7): 20 20 16 10 00 00\n/ # ","type":"text"}]}]}]}],"version":1}

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