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The FreeRTOS BSP provides a device driver for the I2C Master mode operation. The driver is configured (enabled / disabled) at the BSP build time, using the HAL_I2C_MODULE_ENABLED configuration option, defined in the stm32h7xx_hal_conf.h file.

1.2. FreeRTOS I2C Master Mode C-Binding API

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Function

Description

Comments

I2C_HandleTypeDef * i2c_init(uint32_t bus, uint32_t freq)

Initialize a specified I2C bus

bus is the I2C interface (1 to 4 corresponding to the number of the I2C bus interface); freq is I2C bus frequency: 100 corresponding to 100KHz operation, 400 corresponding to 400KHz operation; returns the I2C interface handle or 0 in case of error

uint32_t i2c_read(I2C_HandleTypeDef * hi2c, uint16_t i2c_addr, uint16_t mode, uint16_t data_addr, uint8_t * data, uint16_t size)

Read a specified I2C device on a specified I2C interface

mode defines how the data_addr parameter is interpreted, allowed values are: 0 - 8 bits address, 1 - 16 bits address; data_addr - address (offset) at specified i2c_addr; returns 0 or the I2C error code, which can be one of the following: 0x01 (BERR), 0x02 (ARLO), 0x04 (ACKF), 0x08 (OVR), 0x10 (DMA transfer error), 0x20 (timeout error), 0x40 (size management error); Implementation is interrupt-driven

uint32_t i2c_write(I2C_HandleTypeDef * hi2c, uint16_t i2c_addr, uint16_t mode, uint16_t data_addr, uint8_t * data, uint16_t size)

Write a specified I2C device on a specified I2C interface

mode defines how the data_addr parameter is interpreted, allowed values are: 0 - 8 bits address, 1 - 16 bits address; data_addr - address (offset) at specified i2c_addr; returns 0 or the I2C error code, which can be one of the following: 0x01 (BERR), 0x02 (ARLO), 0x04 (ACKF), 0x08 (OVR), 0x10 (DMA transfer error), 0x20 (timeout error), 0x40 (size management error); Implementation is interrupt-driven

int i2c_fastmode_enable(I2C_HandleTypeDef * hi2c)

Switch a specified I2C bus to 400KHz operation

int i2c_fastmode_disable(I2C_HandleTypeDef * hi2c)

Switch a specified I2C bus to `100KHz operation

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Command

Description

Comments

i2c_read bus i2c_addr:mode data_addr count

Read a specified I2C device on a specified I2C interface

bus is the I2C interface (1 to 4 corresponding to the number of the I2C bus interface); mode is optional and defines how the data_addr parameter is interpreted, allowed values are: 0 - 8 bits address, 1 - 16 bits address; data_addr - address (offset) at specified i2c_addr

i2c_write bus i2c_addr:mode data_addr data

Write a specified I2C device on a specified I2C interface

bus is the I2C interface (1 to 4 corresponding to the number of the I2C bus interface); mode is optional and defines how the data_addr parameter is interpreted, allowed values are: 0 - 8 bits address, 1 - 16 bits address; data_addr - address (offset) at specified i2c_addr

i2c_scan bus

Scan a I2C interface

bus is the I2C interface (1 to 4 corresponding to the number of the I2C bus interface.) This commands writes an arbitrary value to each found I2C device, potentially resetting it to default state; if any of I2C devices had previously been configured by application code, it needs to be reconfigured after i2c_scan has been called

2. Validating I2C Master Operation

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